锁相环路 [电子] phase-lock loop
- 交叉耦合锁相环路(CCPLL)无输入时的稳定性是其正常工作的必要条件。
It is necessary to ensure the stability of the cross-coupled phase-locked loop (CCPLL) when there is no input signal. - 本文介绍某一测量系统中数字锁相环路数据采集及其接口电路的设计,并给出了相应的软件流程。
This paper deals with the collect of digit phase-locked loops and design of the interface circuit, and gives the programs flow diagram. - 将计算机运用到锁相环路中对无线电测量设备进行技术改造是现代测量系统采用高新技术的一种尝试。
When we transform the radio measure instrument applying the microcomputer to phase locked loops is a first try in modern measure system with high-new technology.
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