delay circuit [计] 延迟电路
- An improved scheme of a twin-pulse generator and design considerations of time delay circuit of the generator are discribed. Experiment results of the time-delay
本文叙述了双脉冲发生器的一种改进方案及其延时电路的设计考虑。给出了延时电路的实验结果。 - The paper introduced a way of designing changeable delay chip with CPLD and discussed its realizable circuit and emulation oscillogram.
介绍了用CPLD设计可变延时芯片的方法,并讨论了具体的实现电路和仿真波形图。 - Warning: Circuit may not operate. Detected4 non-operational path( s) clocked by clock clk with clock skew larger than data delay. See Compilation Report for details.
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